Flip flops can be triggered by the edges of the clock pulse or the high or low states.

low trigger positive edge trigger high trigger
triggered when on negative edge triggered on low triggered on positive edge triggered on high

Create timing diagrams that shows all the valid states for J, K, Q and Q' with the clock pulse for each kind of flip flop

Negative edge triggered

timing diagram

Low trigger

timing diagram

Positive edge trigger

timing diagram

High trigger

timing diagram

The D flip flop has the same options